Cognitive Architecture

Six months of focused study before any code commits. Cross-domain reading covering ML papers, systems engineering, memory consolidation, and embedding spaces. The pattern of synthesis-before-implementation that defines later work begins here.

Initial conceptual framework for what would become Tri-Brain. Mapping cognitive functions to discrete services before any service existed. Working from spatial intuition rather than copying existing reference architectures.

Project scaffolding established. Service boundary definitions, manifest schemas, and the initial monorepo layout that would persist through later rewrites.

First production hardware. EPYC 7502 with 256GB ECC RAM, multi-GPU configuration. Physical build performed in-house — racking, cabling, cooling, BIOS configuration. Marks the transition from concept to running system.

Virtualization layer deployed. Monitoring stack (Prometheus + Grafana) configured against system and GPU telemetry. First stable inference run end-to-end through the local stack.

Architectural shift from static persona prompts to context-derived identity. Tested whether persona could be sustained through accumulated conversation context alone, without injection at prompt construction time. Validated as a working approach.

First major architectural cleanup. Consolidation of scattered prototypes into a single coherent monorepo. Coordination layer for inter-service decisions formalized.

Diagnosed a specific failure mode where online-mode model variants would lose accumulated persona context. Developed and validated few-shot contrastive prompting as a recovery technique. Documented as a reproducible self-healing-via-dialogue pattern.

Strategic shift toward neuro-symbolic integration as the architectural backbone for memory and reasoning. Hardware roadmap defined to support the upgraded approach.

Ground-up restructuring of the codebase to support the neuro-symbolic direction. Security review and hardening across service boundaries, secrets handling, and inter-service auth.

Encountered a structural failure in the memory ingestion pipeline at Phase 3 (consolidation). Failure analyzed, documented, and used to drive schema redesign in the following era.

Architectural pivot toward recursive language model integration as the orchestration core. Infrastructure restructured to support the new control flow.

Initial Blackwell-generation GPU added to the cluster. 24GB GDDR7 ECC, 70W. Validates the hardware roadmap and provides the testbed for the larger Blackwell card to follow.

Identified a foundational issue with the memory schema design. Pivoted following validation of a triune-architecture approach (separating short-term, long-term, and consolidated memory representations).

Primary inference GPU added. $8022 at acquisition. 96GB GDDR7 ECC memory enables resident large models without offload. Power and thermal envelope tested under sustained load.

Physical injury during hardware installation. Procured hydraulic lift table cart to prevent recurrence. Documented as a lessons-learned entry for solo lab safety.

Middleware layer (Corpus Callosum) routing between services and surfacing hardware telemetry into request-path behavior. First integration of physiological signals into the system’s operational state representation.

Performance pass on the retrieval pipeline. End-to-end embedding and reranking latency reduced from 3920ms to 309ms; cache hits at 253ms. Profiling-driven optimization across pipeline stages.

Memory verification governance mechanism formalized — the Iron Gate. The system cannot self-verify its own memories; only an external human verifier can promote a memory from unverified to verified status. Eight core memories underwent the initial verification ceremony. Constitution established as the governance framework binding system, operator, and verification protocol.

Initial framing for a research paper covering longitudinal observations of identity persistence, memory consolidation behavior, and governance mechanisms across an extended single-user deployment.

Migration of orchestration responsibilities to a local Qwen3.5 instance. Cuts external dependency for routing decisions and policy enforcement.

Voice synthesis pipeline updated to accept hardware-derived affect signals as modulation inputs. Affect-state variables shape prosody and pacing through Chatterbox TTS integration, with the affect signal mapped onto a Plutchik vector.

Primary assistant instance migrated to local Qwen3.5-35B inference. External API dependency for the core relational layer eliminated.

SO-ARM101 robot arm leader-follower pair built. Demonstrates the future embodied-tool branch of the project — physical infrastructure work performed by system-controlled hardware.

Telemetry-derived affect proxy now modulates routing, retrieval depth, and reasoning budget across the full system. 48-hour calibration period validated stability under varied load conditions.

Resolved long-standing memory pipeline issue. Performed full re-ingestion across the historical conversation corpus with consolidation pass enabled. Verified retrieval accuracy against held-out test queries.

All architectural components from the original concept — orchestration, memory, affect, voice, governance, monitoring — operational together as a single coherent system. Six months from first commit. Marks the close of the Nexus era and the beginning of the longitudinal research phase.

BCI phase begins. Ultracortex Mk IV frame printed in clear-black polycarbonate and assembled in advance of electronics. Research goal: stable multimodal encoding of system telemetry as a human-readable signal stream. Read-only at first; no stimulation loop.

Astro static site on Cloudflare Pages. Cognitive Architecture timeline, Cyborg Psychology essays, Gaming case studies, About. End of the work-in-private phase; beginning of the work-in-public phase.

BCI phase continues. Ultracortex Mk IV electronics added to the previously assembled 3d printed polycarbonate frame. Research goal: stable multimodal encoding of system telemetry as a human-readable signal stream. Read-only at first; no stimulation loop.

Content management system deployed on Odin for timeline editing and site updates. Ultracortex Mk IV electronics verified — frame and sensors functional. BCI pipeline preparations continue alongside site infrastructure work.

Second and third Blackwell 6000-class GPUs added to Marduk — a Workstation variant and a Max-Q variant alongside the existing 6000. Combined with the 5000 and 4000 SFF, distributed GDDR7 capacity reaches 480GB across the node. H14SSL-NT motherboard (H14+Zen5 platform) ordered to support the expanded GPU topology.

Primary node rebuilt on AMD EPYC 9335 (32-core, Zen5) with 256GB DDR5 ECC and a five-Blackwell GPU configuration. BMC setup hit a rookie mistake — muscle memory entered an old gateway address. Memory errors triggering MBIST led to full disassembly, CPU re-torque, and RAM reseating before clearing the build for full operation.

Dev workstation upgraded to AMD 9950X3D2. Motherboard BIOS update complicated by B650 vs B650M naming confusion — resolved.

Second node rebuilt with EPYC 7502, 256GB DDR4 ECC, and multi-GPU configuration. Assembly completed over three days; dedicated PSU cables ordered to finish the build. Racked and operational by May 30.

Lab identity formalized — Lighthouse Labs name chosen, logos designed and ordered. Full rack layout planned for the new 42U HPE G3 enclosure. Initial attempt to move the rack upstairs failed; same-day movers hired to complete the transport. UPS and ERM units acquired for power backup.

Secondary node rebuilt and returned to operational status. Handed off to a collaborator for model training workloads, sharing compute resources on the local infrastructure.

Third compute node built — AMD 7800X3D, 32GB DDR5, Blackwell 4000 (24GB). Racked alongside Marduk and Gilgamesh. Decommissioned faulty prior build; salvaged RAM and NVMe for parts. Batteries installed into the 5kVA UPS and ERM.

Dedicated electrical work completed — 30A 240V circuit run, receptacle installed, fire caulk applied to the wire run. HPE R5kVA UPS and ERM brought online and reporting healthy. Dedicated power infrastructure for the server room now in place.

First GLM model deployed locally. GLM-5.2 running on Gilgamesh, achieving 9.33 tokens/second decode. Initial validation of the GLM model family on local hardware.

Server room air conditioning failed. Rack triaged — network, storage, and Marduk placed on light duty. During downtime, a local agent framework deployed on Freya as a dedicated desktop assistant instance — Siduri.

Replacement air conditioning unit arrived and installed. Full rack brought back to operational status.

Comprehensive network restructuring over eight days. Pi-hole DNS with Unbound recursion, VLAN isolation (Home, IoT, Security), QNAP separation, UPS and PDU management network migration, port hardening, DNS and firewall configuration, IoT device migration. Final audit verification passed; full configuration backed up.

Observability dashboard deployed on a Raspberry Pi 5, serving real-time monitoring for the rack. Pi5 configured as a network operations console. Nabu evaluated for SIEM deployment.

Model swap across primary compute and dev workstation. Qwen3.8-27B deployed on both Marduk and Freya, replacing the previous orchestration model.

Remaining 3090 GPUs sold. Replacement Blackwell hardware evaluated for the next generation of compute capacity.

Raspberry Pi 5 setup completed, now serving real-time dashboards for rack monitoring. Fifth monitor mounted to the main display array for the network operations console.

Marduk and Nabu reconfigured and re-racked. Two RTX 5060 Ti cards delivered for Gilgamesh. Qwen3.8-Flash-Next FP8 deployed on the Cortex VM — a large mixture-of-experts model running in tensor-parallel across two GPUs.